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WCDMA DPD ADC: Optimizing and validating high level design parameters of ADC for digital predistortion in base stations
Power amplification of signals with non constant envelope usually creates distortions in the signal due to the nonlinear characteristics of power amplifiers (PAs). To meet the wireless communication standards requirements, techniques are used to linearize PAs and the digital predistortion (DPD) receives a lot of attention because of its digital flexibility and capability. This technique requires the insertion of a feedback path to collect the distorted signal and a digital processing part before the RF power amplifier to perform the calculation of the inverse response of the PA then apply the correction. As in any receiver, the resolution of the analogue to digital converter (ADC) is a fundamental design parameter as the correction depends on the accuracy of samples. Our team designs an optimized ADC for this feedback path and the first step is to define the required performances of this converter to meet the standard emission constraints. Performances of ADCs are usually derived with equations from standard specifications: bandwidth, sensitivity, average power, blocking signals scenarios, bit error rates, etc. But for DPD these constraints are harder to define because the transmitted data bits have not to be decoded as DPD processes modulated waveform samples, so constraints are different, and the computation of the inverse response of the PA is a highly nonlinear process. So to optimize the converter parameters, system simulations have to be performed. In this context, we used a commercial simulation tool to model the complete TX path of a base station with its feedback path at the system level in order to optimize the design parameters of the ADC. We used this tool to model a multi-carrier WCDMA base station with a non linear power amplifier and a DPD. In the feedback path, the minimal performances of a flash ADC were determined with simulations to meet the ACLR standard requirements and replaced with an equivalent band-pass Sigma Delta converter. The demonstration will show the complete system model using the Agilent SystemVue software environment. Simulations to find the minimal performances of the flash ADC and the Sigma Delta converter will be performed.