Increasing chip power densities allied to the continuous technology shrink is making emerging multiprocessor embedded systems more vulnerable to soft errors. Due the high cost and design time inherent to board-based fault injection approaches, more appropriate and efficient simulation-based fault injection frameworks become crucial to guarantee the adequate design exploration support at early design phase. In this scenario, we propose a fast and flexible fault injector framework, called OVPSim-FIM, which supports parallel simulation to boost up the fault injection process. Aiming at validating OVPSim-FIM, several fault injection campaigns were performed in ARM processors, considering different Linux Kernels and benchmarks with up to 87 billions of object code instructions. Results have shown that OVPSim-FIM enables to inject faults at speed of up to 3,000 MIPS, depending on the processor and the benchmark profile, enabling to identify errors and exceptions according to different criteria and classifications. Results also show that the accuracy of OVPSim-FIM is below to 10% when compared to a gem5-based implementation.