Nostrum is a research project aiming at developing a Network-on-Chip architecture. It mainly focuses on the communication issues from the physical to the application levels. Its main characteristics are: 

• A regular, two dimensional mesh topology.
• Each switch is connected to four other switches and thus form the mesh structure.
• A resource (processor, DSP, custom hardware, or any IP block) is connected to exactly one switch. Resources communicate by sending packets over the switching network.
• Although the resources may be of different size, the regularity of the mesh structure allows for fine control of physical parameters, predictability of performance and power, and and sophisticated, efficient clocking schemes.
• The switch network is one pseudo-synchronous clock domain. I.e. the clock frequency for each siwtch is the same but the clock phases may vary. The resources may be controled by different and arbitrary clocks.
• Nostrum uses an adaptive, deflective routing. This allows for adaptivity in the face of faults and congestion. Moreover, it allows a very small and efficient implementation with minimal buffers.
• Nostrum offers best effort traffic and guaranteed latency traffic. The guaranteed latency traffic is based on looping containers that reserve the required communication resources.

We are working on the admission protocol, mapping techniques, clocking and a number of other issues. As the work progresses, Nostrum will adopt more distinct and characteristic features in these areas.
In principle the Nostrum technology is general and suitable for any application for which a complex System-on-Chip solution is required. However, a Nostrum platform has to be optimized for a particular application domain. For this reason we investigate network processors and multi media applications, which are two promising areas where Nostrum can constitute very suitable platforms on which efficient product development can be based.