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MECS + DesParO - Hierarchical Simulation and Robust Design Aspects

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Tool Name (abbreviation): 
MECS + DesParO
Author(s): 
- -, -, DE
(unregistered) Author(s): 
Tanja Clees (Fraunhofer Institute SCAI, Sankt Augustin, Germany)
Caren Tischendorf (Cologne University, Germany)

Within a Fraunhofer research project (together with Cologne University) we are developing a hierarchical simulation strategy and accompanying software modules with special emphasis on - easy transfer between levels of abstraction - investigation of the influence of parameter changes over several design levels - general robust design aspects

Project Information
Project Acronym: 
HIESPANA
Project Start: 
Fri, 02/01/2008
Project End: 
Sat, 04/30/2011
Project Funding ID: 
Fraunhofer MAVO "Hierarchische Simulation"
Project Description: 
Increasing influence of variations on the performance of devices and circuits: With the transition from micro- to nanoelectronics, further scaling of devices and systems encounters challenges due to approaching basic physical limitations. Besides the difficulties in reaching nominal performance figures, variations become increasingly important, as they could lead to enlarged fractions of devices and circuits being out of specifications. This holds not only true for ultralarge-scale integration (“More Moore”), e.g. for memories or high-performance processors, but also for analog and highvoltage devices with relaxed scaling (“More-than-Moore”). Characterization and optimization by means of simulation: The systematic investigation of process variations utilizing experimental methods only is limited. In contrast, simulation in principle allows comprehensive and costefficient study of variations. Using process and device simulation, electrical characteristics of devices for a given process technology and set of parameters can be determined. Based on this, circuit parameters can be extracted which allow characterization of the properties of the circuit. Alternatively, this can also be achieved by tightly integrated hybrid device and circuit simulation. When now considering variations on process level, by using simulation it is possible to quantify the influence of these variations on device, circuit, and system level. In conclusion, simulation has the strong potential to characterize and minimize the influence of variations. This is highly relevant for the optimization of the manufacturing process for nanoelectronic devices and systems.