MHLS (MACT High-Level Synthesis) starts with the scheduling phase of the dataflow graph. Due to the bit-serial characteristic of MACT the allocation and binding phase is simple, because all operations within the dataflow graph are directly mapped to real resources. Furthermore, all additional control wires of MACT are generated during the synthesis. This basic operations stored in a library can easily be extended by the user. A grammar is defined.

Projects:
Name of the project: DFG SPP VIVA, Teilprojekt EVA (Entwurf Verlustarmer Architetkurvarianten) Leader: für unser Teilprojekt: Prof. Dr. Franz J. Rammig, Achim Rettberg E-mail: achim@c-lab.de Internet address: www.c-lab.de Project partner: Start of the project: 1999 End of the project: 2005

Contact:
Achim Rettberg (achim@c-lab.de)