In this demo we present the concept of a networked lightweight and partially reconfigurable platform assisted by a remote bitstreams server. We propose a software and hardware architecture as well as a new data-link level network protocol implementation dedicated to dynamic and partial reconfiguration of FPGAs. These systems target embedded applications with very scarce hardware resources taking advantage of dynamic, specific and optimized architectures. Based on FPGA, they require a network controller and much less external memories to store reconfiguration software, bitstreams and buffer pools used by standard communication protocols. Our measures, based on a real implementation, show that our system can download remote bistreams with a reconfiguration speed ten times faster than known solutions.

Contact:
Pierre Bomel (pierre.bomel@univ-ubs.fr)