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Hierarchical Test Application and Evaluation
We are presenting a package for testing system level designs. This package can be used to test a hybrid design consisting of gate level C++ codes and C++ complex functions as its processing elements, and TLM-2.0 transport interfaces as its communications. Our test utilities can be applied to communication channels and gate level parts simultaneous with simulation of high level C++ parts. Stuck-at, bridging and crosstalk fault models are considered for testing the gate level parts of a processing element or communications, while high level fault models are defined for testing high level communications.