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Hardware-in-the-Loop Simulations with Matlab/Simulink/ModelSim for FPGA based designflows

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(unregistered) Author(s): 
Christopher Pohl
Carlos Paiz
Mario Porrmann

This demonstrator shows the design flow and a working example of our Hardware-in-the-Loop Design Environment for FPGAs. Arbitrary VHDL designs can be automatically integrated into simulation or visualization tools, enabling functional verification and real time monitoring of that hardware design

Contact:
Christopher Pohl (pohl@hni.upb.de)

Project Information
Project Acronym: 
SFB 614
Project Description: 
Self-Optimizing Concepts and Structures in Mechanical Engineering: Modern products created in the field of mechanical engineering rely on the close interaction between mechanics, electronics, control engineering and software technology that is termed “mechatronics”. This trend is driven by information technology to a considerable extent, a field that is developing continously and will in future give us machines with inherent partial intelligence. It is this aspect that we characterize as “self-optimization”. We use the term “self-optimization of a technical system” to mean the endogenous adaptation of the system’s objectives to changing environmental conditions and the resultant autonomous purposive adaptation of its parameters, possibly also its structure, and thus its behavior. Self-optimization thus goes considerably beyond the familiar rule-based and adaptive strategies; self-optimization facilitates systems with inherent “intelligence” that are able to take action and react autonomously and flexibly to changing operating conditions.