Disydent (Digital System Design Environment) is a set of tightly coupled tools that allow to start from an application described as a set of communicating tasks and a predefined platform and allows to easily map the former onto the latter. The tool demonstrated at DATE this year is called DSG, Disydent System Generator. It is a new addition in Disydent and allows to generate user defined mapping in a simple manner : all implementation details are taken care of by the generation tool, leaving to the designer a small set of system level and not implementation level choices. The generated system is a set of files than run under SystemC using the cycle accurate, bit accurate, simulation models of the SocLib library.

Contact:
Frédéric Pétrot (Frederic.Petrot@imag.fr)
Departement: ASIM Department of the LIP6 Laboratory, Université Pierre et Marie Curie (Paris 6)