Limitations of logic and RAM resources of FPGAs are bottlenecks for many complex algorithms. Modern FPGAs support dynamic reconfiguration. It allows local changes inside the FPGA during run-time. Partitioning of complex algorithms in smaller sequentially reconfigured and executed units makes smaller FPGA devices suitable, since there is no need to configure the completely implemented design into the FPGA anymore. A video processing framegrabber, connected to a high resolution matrix camera, is implemented as a demonstrator for a complex self-reconfigurable design on a Virtex-4 based evaluation board.