Runtime reconfigurable systems are a promising way to solve problems when designing embedded systems since they combine software-like flexibility with hardware parallelism and performance. Today there are prototyping platforms available on the market and intensive scientific research on how to exploit this opportunity is being done. Designing complex systems requires an adequate way of modeling. Unfortunately the common description languages suffer from two major drawbacks: They provide a low level of abstraction and focus on static ASIC-style hardware. The former problem is being addressed by hardware description languages like SystemC or OSSS, which is based on SystemC. The approach presented here named OSSS+R extends OSSS with capabilities to model, simulate and synthesise reconfigurable architectures. The simulation capabilites are demonstrated at the booth.

Projects:
See also: http://odette.offis.de

Contact:
Andreas Schallenberg (Andreas.Schallenberg@Uni-Oldenburg.de)