Skip to Content

Asynchronous Micropipeline Synthesis Flow

0
Your rating: None

Weaver-DC synthesizes asynchronous very fine-grain micropipeline implementations of designs specified in synthesizable HDL by using a commercial synthesis engine (currently Synopsys DC-Ultra) for RTL synthesis and re-implementing the resulting RTL as a micropipeline defined by a stage library.

Contact:
Alexander Smirnov (alexbs@bu.edu)

Project Information
Project Acronym: 
WEAVER
Project Description: 
Weaver: Weaver is an asynchronous EDA flow targeting synthesis of quasi-delay-insensitive (QDI) circuits from large possibly hierarchical high-level behavioral or structural speciefications